Oct 13, 2026

Microsoft's Maia 300 Leads a Wave of Open AI Rack Designs at OCP

Microsoft unveiled its third-generation Maia 300 AI accelerator as Nvidia, AMD and Intel used the OCP Global Summit to push open, rack-scale designs built for inference and AI agents.

Listen to this update

Microsoft pulled back the curtain on Maia 300, the third generation of its in-house AI accelerator, on October 12, the same day Nvidia, AMD and Intel used the Open Compute Project (OCP) Global Summit in San Jose to show off their own rack-scale designs. Taken together, the announcements show where the AI hardware race is heading: away from single chips and toward whole racks, open specifications and inference at enormous scale.

Maia 300: built for inference, sized for the rack

In a detailed Azure blog post, Microsoft hardware leads Rani Borkar and Saurabh Dighe described Maia 300 as a chip designed around one job: serving large language models efficiently. The compute die is made on TSMC's N2P process, with memory-controller and I/O functions split onto separate dies. Each accelerator carries eight stacks of HBM4 memory, for 288 GB of capacity and 18 TB/s of bandwidth, alongside software-managed on-die SRAM.

Compared with the Maia 200, Microsoft says the new part delivers 2.5 times the memory bandwidth, a third more memory capacity, roughly double the HBM bandwidth per watt and 36% more system compute. The company's headline claim is up to seven times the rack-level token throughput of its predecessor in a full configuration, and more than 2.5 times the performance per watt.

The rack itself is where much of the change shows up. Microsoft packs 96 accelerators into 24 four-chip trays inside a 167 kW rack, doubling accelerator density over Maia 200. Liquid cooling handles more than 80% of the heat, and a 50 V busbar distributes power. A two-tier scale-up network, with optical links in the second tier, can tie together as many as 12,288 accelerators across up to 128 racks in a single "superpod."

Microsoft frames the design goal as making sure "every watt and every dollar delivers more intelligence." The blog post did not give a launch date, saying more details will come at Microsoft Ignite in November. Earlier reporting from Techzine, citing The Information and Azure Maia general manager Andrew Wall, pointed to 2027 for the chip's arrival, with Microsoft negotiating with TSMC for capacity to build more than 300,000 units. That same report noted Microsoft is courting outside AI companies, including Anthropic, to run on Maia.

Nvidia opens up its Vera Rubin racks

Nvidia's summit news centered on openness rather than a new chip. The company contributed its Vera Rubin rack and compute-tray designs to OCP through its MGX architecture. The updated MGX 1.2 specification adds rack-scale blind-mate liquid cooling, a liquid-cooled 5,000-amp busbar, support for standard 19-inch equipment and configurable I/O bays, and supports racks of up to 250 kW.

Nvidia also joined AMD, Google and Meta on version 0.7 of the Open Data Center Specification, which covers facility design from power delivery to cooling and layout. Separately, Google, Meta, Microsoft and Nvidia published a grid resilience specification describing how AI data centers should ride through power-grid disturbances. Other Nvidia announcements included open-source components for its DSX data center software, a new pluggable optics form factor developed with Cisco, and Meta's adoption of Nvidia's Spectrum-6 Ethernet switches.

AMD's Helion targets AI agents

AMD introduced Helion, an open rack-scale blueprint aimed at agentic AI, the class of software that plans tasks, calls tools and runs code on a user's behalf. A CPU-only version built on 6th-generation EPYC processors supports up to 32,768 cores per rack, giving hyperscalers dedicated capacity to run agents while model inference happens elsewhere. An all-in-one version mixes EPYC CPU nodes with Instinct MI350P GPU nodes for enterprise customers.

Helion comes in liquid- and air-cooled variants and includes a built-in token router that sends an agent's model calls to different frontier or open-source models. AMD says it will contribute the specification to OCP, and partners including Dell, HPE, Lenovo, Supermicro, Cisco and Wiwynn are developing configurations planned for November 2026.

Intel bets on memory capacity

Intel took a different route with its D270 data center GPU, an inference card that skips expensive high-bandwidth memory in favor of up to 480 GB of LPDDR5X. The 350-watt, air-cooled PCIe 5.0 card is meant to slot into existing servers without a liquid-cooling retrofit, targeting long-context and high-concurrency workloads. Intel has not published a shipping date on its product page.

Why it matters

The common thread is that AI demand is now shaped by inference and agents, not just model training. Hyperscalers like Microsoft want custom silicon to cut their dependence on Nvidia and lower the cost of every token they serve. Nvidia, meanwhile, is pushing its designs into open standards so the industry builds around its racks. And both AMD and Intel are carving out niches, from CPU-heavy agent racks to memory-rich cards that fit in ordinary servers.

For buyers, the move toward shared rack, power and cooling specifications could make it easier to mix vendors in the same facility. For the chipmakers, the real test comes in 2027, when many of these designs are expected to reach volume deployment.